Home › Forums › Products › Vsig and Preset Development › H9000+Vsig3 bugs › Reply To: H9000+Vsig3 bugs
Ok so,
If you make a new file in Vsig, save it, then open it in a text editor, it looks like this:
HEADM|adc|ninputs=2|noutputs=2|name=0|tag=0|nkids=1|out1=adc-null|out2=adc-null|kids1=adc-nullobj
TAIL|
—
adc| ;=30,30,100,0
tail|
If you open factory algorithms in a text editor and look after the TAIL| you'll usually see the initials of the person who made the algorithm.
That second lowercase tail| is superfluous, but that first uppercase TAIL| needs something after it, or else the algorithm will turn into a TRHU alg after being uploaded to the H9000.
So in Vsig 3.3, if you want to upload an algorithm that you started creating by clicking File > New File, you'll have to open the sigfile in a text editor and type anything after TAIL|
TAIL|patchen would work fine. Sorry about that.