I know for sure many algos are only using a fragment of a single CORE, so why not have the ability to run more than one algo on a single core?
Each core is SUPER powerful – I can’t believe how much I’ve been able to throw at a single Algo…
e.g. 8 x DLYSMP2, 4 x Easytaps x 2 x MODELAY and complex audio and control signal routing and switching along with calculations! And I’m still going!
Some H9k algos are simply 2 x MODELAY with a few controls
So each algo would need to have a CORE cost at each SR
Theoretically you could have loads of algos in a single matrix.
I’d also love feedback on CORE cpu usage per algo so I know the impact of my algo built in Vsig but I’m in a major minority here until more start building – holding thumbs
Regarding FX Chain routings, I’m personally hoping we would be able to assign, in a single matrix, CPUs to be available for that matrix.
The user can then add e.g 8 algos in that matrix and route within the FXC as they desire.
I think I recall part of the issue is that audio needs to flow through each CPU so 4 on one CPU and then audio goes through to the next CPU?
As you re/arrange the algos in the matrix however, the hardware can reallocate the algos to CPUs and Cores as needed?
